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# OpenTPU – An open\-source AI accelerator, developed by AI

303 points · 352 comments

[Full discussion](<https://news.ycombinator.com/item?id=49980715>)

[Read original](<https://github.com/FeSens/openTPU>)

Category: [Infrastructure & Efficiency](<https://hacksnap.live/?category=infrastructure-efficiency>)

## Skept-o-meter & Hotness

Skept\-o\-meter: High\. Estimated from 10 comments\.

2 comments for the summary\.

Peak rank: \#3

Time in Top 10: 24\.0 hours

Hacksnap ranks recent stories first, then orders each group by points\. Peak rank uses all retained observations\. Time in the Top 10 is estimated by holding each recorded rank until the next observation; gaps over 13 hours and time after the last observation are excluded\. Movement between observations is unknown\.

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openTPU claims an AI\-developed FPGA accelerator runs ten models bit\-exact with its simulator, but the results are self\-reported and the supplied discussion is too sparse to test the claim\.

## The brief

openTPU is an open\-source AI accelerator project whose README says the design was developed by AI agents\. It packages SystemVerilog RTL, an instruction set, a bit\-exact simulator, a kernel compiler and host tools in one repository, targeting an Inspur YPCB\-00338 PCIe card with a Xilinx Kintex\-7 FPGA and two DDR3 channels\. The repo reports running ten models, including LFM2\.5, Qwen3 and Gemma variants, with decode and prefill throughput, DRAM utilization and bit\-exact agreement with the simulator\. It also describes 4\-bit quantization and MoE expert streaming from host storage\. The measurements are the project's own, not independently verified\.

- The card uses a four\-column systolic matrix unit, LiteDRAM controllers calibrated by an on\-chip CPU, and a stream engine; the design closes at 133\.33 MHz with WNS \+0\.032 ns\.
- Reported decode ranges from 3\.78 tok/s for Gemma 4 E4B int8/4\-bit head to 85\.8 tok/s for LFM2\.5\-230M 4\-bit, with DRAM at 82–94% of the 17\.1 GB/s DDR3\-1066 peak\.
- 4\-bit weights use FP4 with two\-level block scales at 4\.25 bits per weight, keeping the LM head in int8; the repo reports 40–45% faster decode and a measurable perplexity cost\.
- MoE models larger than 4 GiB stream experts from host storage; LFM2\.5\-8B\-A1B is reported at 10\.6 tok/s with 98\.5% slot hits, while Qwen3\.5\-35B\-A3B is 3\.95 tok/s with 62% hits and 153 MB streamed per token\.
- The simulator is treated as the specification, and every configuration is claimed to match it token for token; the host adds 0\.17–0\.30 ms per token on omarchy for LFM2/Qwen3\.
- The project invites contributions and requires ISA, simulator or RTL changes to keep pytest passing; performance claims should state measurement method\.

## Discussion themes

Analyzed: 2026\-10\-07T13:00:44\.499147\+00:00

Analysis sample: Based on 28 of 41 usable stored comments. Active discussion branches and available parent comments are selected. The analysis input was further shortened to fit its context limit.

This sample may omit parts of the full thread. Selected themes do not measure community opinion or how common a view is.

### LLM autonomy, novelty and ground\-truth limits

Replies dispute whether AI hardware design counts as AI developing its own hardware\. Critics say a human prompted the LLM and set up the simulation, LLMs lack initiative, cannot confirm physical ground truth, and mainly reuse training data; others argue prompting can be automated and brute\-force search may count as invention\. Simulation accuracy is raised as the hard part\.

Sources: [Comment 49981884](<https://news.ycombinator.com/item?id=49981884>) · [Comment 49981954](<https://news.ycombinator.com/item?id=49981954>) · [Comment 49981957](<https://news.ycombinator.com/item?id=49981957>) · [Comment 49982018](<https://news.ycombinator.com/item?id=49982018>) · [Comment 49982089](<https://news.ycombinator.com/item?id=49982089>) · [Comment 49982706](<https://news.ycombinator.com/item?id=49982706>) · [Comment 49982108](<https://news.ycombinator.com/item?id=49982108>) · [Comment 49982609](<https://news.ycombinator.com/item?id=49982609>) · [Comment 49982814](<https://news.ycombinator.com/item?id=49982814>) · [Comment 49982786](<https://news.ycombinator.com/item?id=49982786>) · [Comment 49982068](<https://news.ycombinator.com/item?id=49982068>)

### Accountability for AI actions

One reply argues that attributing AI outputs to human prompting is about assigning agency and accountability where it lies, rather than anthropomorphizing AI; failing to do so can let companies such as OpenAI escape accountability\.

Sources: [Comment 49982136](<https://news.ycombinator.com/item?id=49982136>)

### Economic tradeoffs of baking models into silicon

Commenters ask why labs do not burn frontier models into chips\. Replies cite model SOTA moving faster than chip design and production, requiring long commitments, while others note older 'good enough' models still serve large token volumes and ASIC speed could be worth it\.

Sources: [Comment 49981087](<https://news.ycombinator.com/item?id=49981087>) · [Comment 49981235](<https://news.ycombinator.com/item?id=49981235>) · [Comment 49981374](<https://news.ycombinator.com/item?id=49981374>) · [Comment 49981787](<https://news.ycombinator.com/item?id=49981787>) · [Comment 49981744](<https://news.ycombinator.com/item?id=49981744>)

### Memory bandwidth and programmability constraints

Replies identify memory bandwidth as the inference bottleneck and say model\-specific chips do not improve it; power, area and programmability tradeoffs matter\. Weights and kernels are seen as too variable to bake in, with suggestions like ROM or blank chips with weights burned in later\.

Sources: [Comment 49981240](<https://news.ycombinator.com/item?id=49981240>) · [Comment 49981398](<https://news.ycombinator.com/item?id=49981398>) · [Comment 49985917](<https://news.ycombinator.com/item?id=49985917>) · [Comment 49981380](<https://news.ycombinator.com/item?id=49981380>)

### Alternative hardware approaches

Commenters point to existing or proposed alternatives: Taalas and chatjimmy, Cerebras serving older models at high speed, FPGAs, and ROM/weights\-collocated designs\.

Sources: [Comment 49981158](<https://news.ycombinator.com/item?id=49981158>) · [Comment 49981787](<https://news.ycombinator.com/item?id=49981787>) · [Comment 49981380](<https://news.ycombinator.com/item?id=49981380>) · [Comment 49981398](<https://news.ycombinator.com/item?id=49981398>) · [Comment 49985917](<https://news.ycombinator.com/item?id=49985917>)

### Recursive self\-improvement and existential risk

A thread contrasts warnings that recursive self\-improvement will kill us all with the current recursive self\-improvement work\. Replies suggest progress may plateau, but that a plateau could still be beyond human capabilities, and joke about metal skeletons\.

Sources: [Comment 49981242](<https://news.ycombinator.com/item?id=49981242>) · [Comment 49981413](<https://news.ycombinator.com/item?id=49981413>) · [Comment 49981574](<https://news.ycombinator.com/item?id=49981574>) · [Comment 49981742](<https://news.ycombinator.com/item?id=49981742>) · [Comment 49981780](<https://news.ycombinator.com/item?id=49981780>)

## Sources & coverage

AI-generated summary · 2026\-10\-06T18:01:06\.200092\+00:00

Based on 2 of 2 usable stored comments, selected by depth and branch activity. This is a sample of the discussion. Article text may also be shortened.

Generated using deepseek\-ai/DeepSeek\-V4\.1\-Flash. Check the linked sources for full context.
